80C49C

aus Schachcomputer.info Wiki, der freien Schachcomputer-Wissensdatenbank
(Weitergeleitet von 80C49HC)

Description

The PD80C39H, PD80C49H, and PD49H are single-chip, 8-bit microcomputers containing an 8-bit CPU, ROM {80C49H and 49H), RAM, 110 ports, and control circuitry. Through CMOS technology, the devices can retain data with low power consumption. In addition, the processor uses two standby modes (HALT and STOP) to further minimize power drain.

Features

  • 98 instructions
  • 1.25 µs instruction cycle time (12 MHz crystal)
  • Addition, logic, and decimal adjust functions
  • 2K x 8-bit ROM (PD80C49H and PD49H)
  • 128 x 8-bit RAM (can be expanded to 256 x 8 bits maximum)
  • Standby function
  • 8-level stack
  • Two sets of working registers
  • Interrupt capability
  • Two test Inputs
  • Internal timerlevent Counter
  • Inputloutput ports (8 bits x 2)
    • Data bus alternative to 110 ports (8 bits x 1)
  • Expandable memory and 110 ports
  • Single-step function
  • Internal dock generator
  • CMOS technology
  • Single power supply of +2.5 to +6.0 V
  • Intel 8049H, 8039H pin compatible