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The INS8048/49/50-Series microcomputers and the INS8035/39/40-Series microprocessors (hereinafter reterred to as the 48-Series) are seif contained, 8-bit parallel, 40-pin, dual tn-line devices fabricated using National Semiconductor's scaled N-channel, sificon gate MOS process, XMOS. The 48-Series devices contain the system timing, control logic, ROM (where applicable) program memory, RAM data memory and 27 I/O lines necessary to implement dedicated control functions. All 48-Series devices are pin compatible, differing only in the size of on-board ROM (where applicable) and RAM as shown below:

INS8048	64 x 8     1K x 8
INS8049	128 x 8	   2K x 8
INS8050	256 x 8	   4K x 8
INS8035	64 x 8	   N/A
INS8039	128 x 8	   N/A
INS8040	256 x 8	   N/A

The devices are designed to be efficient controliers. They have extensive bit handling capability as well as facilities for both binary and BCD arithmetic. Efticient use of program memory is derived from an instruction set comprised predominantly of single bytes. The remaining instructions are two bytes in length. Additional external memory may be added up to a maximum of 4K bytes of program memory and 256 bytes of data memory without paging.


  • 8-Bit CPU, RAM, ROM. I/O in Single Package
  • 2.5 psec Cycle, 6 MHz Clock; 1.36 psec Cycle. 11 MHz Clock
  • On-Chip Oscillator Circuit and Glock (or External Source)
  • 27 1/0 Lines
  • Expandable Memory and I/O
  • 8-Bit Timer/Counter
  • Single Level Interrupt
  • Interrupt has Schmitt Trigger with Hysteresis
  • Over 90 Instructions (Most Single Byte)
  • Binary and BCD Arithmetic
  • Single 15V Power Supply
  • Low Standby Power Mode'
  • Low Voltage Standby (2.2V Min)
  • On-Chip Battery Charging