S3C72P9

The S3C72P9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With an up-to-896-dot LCD direct drive capability, flexible 8-bit and 16-bit timer/counters, and serial I/O interface, the S3C72P9 offers an excellent design solution for a wide variety of applications which require LCD functions. Up to 39 pins of the 100-pin QFP package can be dedicated to I/O. Eight vectored interrupts provide fast response to internal and external events. In addition, the S3C72P9's advanced CMOS technology provides for low power consumption and a wide operating voltage range. The S3C72P9 is made by shrinking the KS57C21516. The S3C72P9 is comparable to KS57C21516, both in function and in pin configuration except that S3C72P9 have a 32,768 a 8-bit ROM, 1056 a 4-bit RAM, 12 common selectable and LCD contrast control function.

OTP

The S3C72P9 microcontroller is also available in OTP (One Time Programmable) version, S3P72P9. S3P72P9 microcontroller has an on-chip 32K-byte one-time-programmable EPROM instead of masked ROM. The S3P72P9 is comparable to S3C72P9, both in function and in pin configuration.

FEATURES

FEATURES

• Memory
  • 1,056 * 4-bit RAM (excluding LCD display RAM)
  • 32,768 * 8-bit ROM

39 I/O Pins

• • I/O: 35 pins
  • Input only: 4 pins

• LCD Controller/Driver
  • 56 segments and 16 common terminals
  • 8, 12 and 16 common selectable
  • Internal resistor circuit for LCD bias
  • All dot can be switched on/off
  • LCD contrast control by software

• 8-bit Basic Timer
  • 4 interval timer functions
  • Watch-dog timer

• 8-bit Timer/Counter
  • Programmable 8-bit timer
  • External event counter
  • Arbitrary clock frequency output
  • External clock signal divider
  • Serial I/O interface clock generator

• 16-Bit Timer/Counter
  • Programmable 16-bit timer
  • External event counter
  • Arbitrary clock frequency output
  • External clock signal divider

• 8-bit Serial I/O Interface
  • 8-bit transmit/receive mode
  • 8-bit receive mode
  • LSB-first or MSB-first transmission selectable
  • Internal or external clock source

• Memory-Mapped I/O Structure
  • Data memory bank 15

• Watch Timer
  • Time interval generation: 0.5 s, 3.9 ms at 32768 Hz
  • 4 frequency outputs to BUZ pin
  • Clock source generation for LCD

• Interrupts
  • Four internal vectored interrupts
  • Four external vectored interrupts
  • Two quasi-interrupts

• Bit Sequential Carrier
  • Supports 16-bit serial data transfer in arbitrary format

• Power-Down Modes
  • Idle mode (only CPU clock stops)
  • Stop mode (main system oscillation stops)
  • Subsystem clock stop mode

• Oscillation Sources
  • Crystal, ceramic, or RC for main system clock
  • Crystal oscillator for subsystem clock
  • Main system clock frequency: 0.4 - 6 MHz
  • Subsystem clock frequency: 32.768 kHz
  • CPU clock divider circuit (by 4, 8, or 64)

• Instruction Execution Times
  • 0.67, 1.33, 10.7 s at 6 MHz
  • 0.95, 1.91, 15.3 s at 4.19 MHz
  • 122 s at 32.768 kHz

• Operating Temperature
  • - 40°C to 85°C

• Operating Voltage Range
  • 1.8 V to 5.5 V

• Package Type
  • 100-pin QFP